The Neo Geo AES+ has been delayed by a year, and a hardware supply problem appears to be at the center of it. Plaion director of hardware and software Ben Jones has explained that the response to the system’s announcement produced significant pre-order demand, but the team then ran into an unusually severe obstacle: it could not place the required chip order.

For customers who committed early, the delay is the immediate concern. But the explanation offers a more useful picture of what changed behind the scenes. This was not described as a simple scheduling slip or a routine shortage. Jones said it was the first time in nearly 20 years working in the field that he had been refused when attempting to order chips. He attributed the pressure in part to AI-related demand.

A pre-order win became a procurement problem

Strong pre-orders are ordinarily the kind of news a retro hardware project wants: they show interest, help establish expected production volume, and can make a niche product easier to justify. Here, however, demand seems to have immediately exposed the challenge of producing hardware that depends on particular components.

Jones said the company moved into procurement after the AES+ announcement and informed its Far East partners of its requirements. Procurement is the process of sourcing and securing the components, materials and supplier commitments needed to build a product. In hardware, that work is not interchangeable with simply ordering more stock. A design can depend on specific part types, quantities and delivery windows. If a required component is unavailable, expensive, or only obtainable on a schedule that misses manufacturing plans, the wider project can be held up.

That appears to be what happened with AES+. Jones characterized the pre-order response as overwhelming and said the necessary chips could not be secured. He later described the original situation bluntly: without a solution for the flash component, “everything was dead.”

It is a useful reminder that pre-orders are evidence of customer demand, not a magic inventory spell. They can allow a manufacturer to plan with more confidence, but they cannot create supply of a constrained part. In this case, the popularity of the product and the supply chain requirements seem to have arrived at the same time—and neither was prepared to politely take a number and wait.

The technical workaround: Serial NOR flash

The reported path forward is a redesign or conversion involving Serial NOR flash. Jones said the team investigated a way to use Serial NOR flash because it was easier to obtain, whereas the Neo Geo setup uses parallel flash.

Flash memory is non-volatile storage: it retains information when power is removed. NOR flash is a category of flash memory commonly suited to storing code that hardware can access reliably. The distinction discussed here is how that memory communicates with the rest of a system.

Related coverage includes Neo Geo AES+ Delay Tied to Chip Supply After Pre-Order Surge.

  • Parallel flash transfers multiple bits over multiple data lines at the same time.
  • Serial flash sends data serially, using fewer lines in sequence.

Neither phrase automatically means “better” for every product. The meaningful issue is compatibility. Hardware designed around parallel flash cannot simply be handed a serial part and told to make friends. Jones said a conversion was required to enable the use of serial flash in a Neo Geo design that uses parallel flash. That conversion is the engineering bridge that lets the system work with a part that is more readily available.

For prospective buyers, the important distinction is between what has been stated and what has not. The available information identifies the component-access problem and the Serial NOR flash approach. It does not establish final performance, a detailed specification change, a revised production date beyond next year, or any particular effect on the finished AES+ experience. Those are questions for future official product updates rather than conclusions that can be drawn from the supply explanation alone.

Why a component change can take time

A change to a critical memory arrangement is not necessarily a matter of swapping one item on a bill of materials for another. Based on Jones’s account, this required the team to find a workable route that preserved the project while using an obtainable component category. That can mean coordination between hardware engineers, component suppliers and manufacturing partners.

Jones said the process involved travelling to Taiwan, talking with partners and exhausting the available options. His comments point to an effort that was both technical and logistical: finding compatible parts is one task; securing an arrangement that can actually support manufacturing is another.

It also explains why an entire year of delay is more believable than a short postponement. The issue was not presented as one missing shipment that could be replaced next week. The team needed an alternative to a flash-memory situation severe enough to threaten the project. A converted memory approach, manufacturing planning and the normal work of turning an engineered answer into a producible system all take time.

AI demand and the wider component squeeze

Jones linked the difficulty to AI. That statement does not prove that every missing or expensive component across gaming hardware is caused by AI, nor does it identify a single supplier or chip. What it does show is that a retro console project is competing in a component market shaped by demand far beyond retro gaming.

Specialist hardware can be particularly exposed to this dynamic. A contemporary mass-market device may have enormous purchasing volume, multiple component options, or established supply relationships. A revival project may instead require a narrower set of parts and compatibility assumptions, making a shortage much more disruptive. The AES+ situation illustrates that a machine based on older hardware expectations can run into very modern supply constraints.

Memory has also been a recurring pressure point for makers of retro-oriented handhelds, alongside display panels. That wider context does not make every device’s circumstances identical, but it helps explain why availability of seemingly mundane parts can decide whether enthusiast hardware stays on track. A project can have a design, customer interest and manufacturing ambition, yet still be stopped by one essential component family.

Storage remains a practical consideration for players across modern and retro-adjacent setups as well; for example, a recent microSDXC card listing underscores how familiar flash-based storage is in gaming hardware discussions. The AES+ issue is substantially different—this is about embedded flash compatibility and sourcing, not expanding a consumer storage library—but the shared vocabulary can otherwise make the distinction easy to miss.

What AES+ customers can reasonably take from this

The best news in the explanation is that Plaion says it found a route through the flash problem and has kept the project alive. Jones described a determination to deliver and said the company had been working on the initiative for years. The existence of an engineering workaround is more concrete than a vague assurance that a delay is being investigated.

The less welcome fact remains the year-long delay. Customers have already experienced a lengthy gap between the initial indication of a delay and broader official clarification, following an earlier report that a Japanese customer had been told about it. The component explanation adds much-needed context, but it cannot retroactively remove the uncertainty faced by people who pre-ordered.

It is also important not to turn a workaround into a guarantee. The current account supports that the team has a Serial NOR flash-based solution and is pursuing delivery next year. It does not guarantee that no further manufacturing complication can arise. Hardware production involves dependencies, and the story of AES+ so far is a clear example of why firms can be confident in a product concept yet still face forces outside the original plan.

A narrow bottleneck with a big effect

The AES+ delay comes down to a very specific kind of problem: a successful pre-order response met a supply chain unable to provide a required class of chip, forcing the team to seek an alternative memory design. That is more informative than treating the postponement as mysterious or assuming demand alone can carry a piece of hardware to release.

For the Neo Geo community, the central development is not merely that the system is late. It is that the project reportedly has a path around the bottleneck, built around Serial NOR flash and a conversion for a system that uses parallel flash. The wait is still real, and next year remains the stated horizon, but the explanation suggests AES+ is moving through an engineering and procurement reset rather than being quietly abandoned.